1. Field of Disclosure
The present disclosure relates to a cell test method for a tri-gate type pixel structure, and more particularly to a liquid crystal display panel using shorting bars for test.
2. Related Art
A manufacture of a liquid crystal display panel includes an array process, a cell process and a module process, wherein a product can be tested after each process, whereby the deflective product can be rejected.
Referring FIG. 1, it shows a schematic plan view of a liquid crystal display panel 10 in the prior art. Test pads 60 for a cell test method are disposed a non-display region of the liquid crystal display panel 10. When shorting bars are used for the cell test method, signals of odd gate lines Godd and even gate lines Geven (i.e., scan lines) are separated from each other, and signals of red data lines DR, green data lines DG and blue data lines DB are also separated from each other. The first shorting bar 61 is electrically connected to the red data lines DR, the second shorting bar 62 is electrically connected to the green data lines DG, the third shorting bar 63 is electrically connected to the blue data lines DB, the fourth shorting bar 64 is electrically connected to the odd gate lines Godd, and the fifth shorting bar 65 is electrically connected to the gate lines Godd and Geven, data lines DR, DG and DB.
Recently, the test pads 60 for a cell test method using the shorting bars are corresponding to the gate lines Godd and Geven, the data lines DR, DG and DB and common voltage Vcom respectively. When the common voltage Vcom is 5V (volt), a waveform sequence of the shorting bars is shown in FIG. 3 if red pixels (R pixels) need to be turn on (shown in FIG. 2). For example, when the gate lines Godd and Geven send a voltage of “turn-on” signal (e.g., 17V is the voltage of “turn-on” signal, and −8V is the voltage of “turn-off” signal.), the R pixels can be turn on if the data lines DR sends voltages of 5.1V and 4.9V; and G and B pixels can be turn off if the data lines DG and DB sends voltages of 10V and 0V.
Similarly, when the common voltage Vcom is 5V, a waveform sequence of the shorting bars is shown in FIG. 5 if G pixels need to be turn on (shown in FIG. 4). For example, when the gate lines Godd and Geven send a voltage of “turn-on” signal (e.g., 17V is the voltage of “turn-on” signal, and −8V is the voltage of “turn-off” signal), the G pixels can be turn on if the data lines DG sends voltages of 5.1V and 4.9V; and R and B pixels can be turn off if the data lines DR and DB sends voltages of 10V and 0V.
Similarly, when the common voltage Vcom is 5V, a waveform sequence of the shorting bars is shown in FIG. 7 if B pixels need to be turn on (shown in FIG. 6). For example, when the gate lines Godd and Geven send a voltage of “turn-on” signal (e.g., 17V is the voltage of “turn-on” signal, and −8V is the voltage of “turn-off” signal), the B pixels can be turn on if the data lines DB sends voltages of 5.1V and 4.9V; and R and G pixels can be turn off if the data lines DR and DG sends voltages of 10V and 0V.
The above-mentioned cell test method and the waveform sequence of the shorting bars thereof are mainly applied to a thin film transistor liquid crystal display panel having a single-gate type pixel structure. However, the above-mentioned cell test method and the waveform sequence of the shorting bars thereof cannot be applied to a thin film transistor liquid crystal display panel having a tri-gate type pixel structure, because the single-gate type pixel structure uses the data lines DR, DG and DB. to control R, G and B pixels, but the tri-gate type pixel structure changes this design and uses the gate lines GR, GG and GB. to drive R, G and B. pixels. If the cell test method for the tri-gate type pixel structure also uses the shorting bars for test, the waveform sequence of the shorting bars of the single-gate type pixel structure can not drive R, G and B pixels to be turn on in order. For example, when the gate lines GR and GG send a voltage of “turn-on” signal at the same time period, the R and G pixels can be turn on at the same time period (shown in FIG. 8) if the data lines Deven sends voltages of 5.1V and 4.9V.
Therefore, it is required to provide a cell test method for the tri-gate type pixel structure capable of solving the forgoing problems.